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Fossum, “The ballistic nanotransistor: A simulation study,” IEDM Tech. Antoniadis, “On experimental determination of carrier velocity in deeply scaled NMOS: How close to the thermal limit?, IEEE Electron Dev. Bendix, “Performance limits of Si MOSFET’s,” IEDM Tech.

If the device is mounted to an extremely good heat sink that maintains the case temperature at 5 0 ∘ C, what is the maximum allowable current pulse magnitude? You may assume that the MOSFET on-state resistance is always at its 15 0 ∘ C value.F. Suppose the device is instead operated in a pulsed fashion, carrying large pulses of current 800 μ s in duration with 79.2 ms of off time between pulses. What is the maximum allowable thermal resistance of the heat sink ? B.

The MOSFET is attached to a heat sink using an insulating pad with a maximum thermal resistance of 0.7 5 ∘ C / W. Assume that the device must carry a (forward) rms current of 40 A, and that switching losses can be ignored. Use the 'typical' values instead of the max values (in practice, use max if you want a conservative design!) 4. The on-state resistance of the MOSFET varies with junction temperature, as illustrated in datasheet Fig. You don't always want to push to the full rating. The MOSFET can tolerate a junction temperature of 17 5 ∘ C, but limiting to a lower value can help improve the lifetime/longevity of the device. Assume a maximum allowable junction temperature of 15 0 ∘ C and a maximum ambient temperature of 6 0 ∘ C for this problem. Problem 7.3 Download the datasheet for Infineon power MOSFET IPP051N15N5 available on Canvas.

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